The present invention relates to a semiconductor device and it is, for example, suitably applicable to a semiconductor device that generates a plurality of boosted voltages with a larger absolute value than an input voltage using a booster circuit.
In the semiconductor device, a power supply voltage is lowered, and a high voltage is partly used for a circuit or a memory element that requires a voltage higher than the power supply voltage. This allows the semiconductor device to reduce power consumption. In order to use a single external power supply and reduce the number of external terminals, a high voltage is generated from an input voltage by a booster circuit that is located internally without increasing the varieties of external power supply voltages that are supplied externally.
Techniques to generate a plurality of internal voltages are disclosed in Japanese Unexamined Patent Application Publications Nos. H11-134892 and 2009-301087. According to the technique disclosed in Japanese Unexamined Patent Application Publication No. H11-134892, a high voltage switch circuit is connected between output terminals of two charge pump circuits. Then, until the output voltage of the charge pump circuits reaches a specified voltage level, the high voltage switch circuit is turned into conduction so that the output voltage rises by the two charge pump circuits. On the other hand, after the output voltage reaches a specified voltage level, the high voltage switch circuit is turned off so that different output voltages are generated by the two charge pump circuits.
Further, according to the technique disclosed in Japanese Unexamined Patent Application Publication No. 2009-301087, a plurality of voltages obtained by adjusting a voltage value of a reference voltage by changing a code value are held by a sample and hold circuit, thereby generating a plurality of reference voltages.